[PATCH 1/2] fbdev: da8xx:: fix reporting of the display timing info

Timing info is not properly reported by the driver, e.g.:

$ fbset -i
mode "480x272-95"
    # D: 21.429 MHz, H: 33.018 kHz, V: 95.429 Hz
    geometry 480 272 480 544 16
    timings 46666 64 64 32 32 41 10

According to the timing values defined for LK043T1DG01 display
it should be reported as:

mode "480x272-52"
    # D: 7.834 MHz, H: 14.921 kHz, V: 51.810 Hz
    geometry 480 272 480 544 16
    timings 127655 2 2 2 2 41 10

Initialize additional fb_var_screeninfo fields so fix this problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Manjunathappa, Prakash <redacted>
---
 drivers/video/da8xx-fb.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 29577bf..27c2794 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c

@@ -240,6 +240,14 @@ static struct da8xx_panel known_lcd_panels[] = {
 	},
 };
 
+static inline unsigned long hz_to_ps(unsigned long hz_val)
+{
+	unsigned long long num = 1000000000000ULL;
+
+	do_div(num, hz_val);
+	return (unsigned long)num;
+}
+

 /* Enable the Raster Engine of the LCD Controller */
 static inline void lcd_enable_raster(void)
 {

@@ -1209,6 +1217,11 @@ static int __devinit fb_probe(struct platform_device *device)
 
 	da8xx_fb_var.hsync_len = lcdc_info->hsw;
 	da8xx_fb_var.vsync_len = lcdc_info->vsw;
+	da8xx_fb_var.right_margin = lcdc_info->hfp;
+	da8xx_fb_var.left_margin  = lcdc_info->hbp;
+	da8xx_fb_var.lower_margin = lcdc_info->vfp;
+	da8xx_fb_var.upper_margin = lcdc_info->vbp;
+	da8xx_fb_var.pixclock = hz_to_ps(lcdc_info->pxl_clk);