Thread (6 messages) 6 messages, 2 authors, 2009-11-10

Re: [PATCH 3/6] pxa: fix pxa168 lcd controller vsync/hsync timing error

From: Eric Miao <hidden>
Date: 2009-11-09 03:39:30
Also in: linux-arm-kernel

quoted
Could you please help double check this? My understanding is
FB_SYNC_VERT_HIGH_ACT means it's a positive pulse covering all the
valid HSYNCs, and a rising edge of VSYNC means a start of the frame.

However, CFG_INV_VSYNC is '1' means the opposite.
My understanding is that high active means high level trigger new
frame/line. Below page support my point if it is not wrong.

http://www.arcadecollecting.com/info/Sync_fixing.txt
Tried to find the specific diagram in the spec on what CFG_INV_* means
but failed, can you help verified this with an oscilloscope and let know
the result? This is a fix then, and I'd like it to get into .32, sorry for late
reply.

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