Thread (10 messages) 10 messages, 3 authors, 2006-06-27

Re: radeonfb: DDC read wrong?

From: Robert Siemer <hidden>
Date: 2006-06-24 21:57:13

On Sun, Jun 25, 2006 at 05:33:21AM +0800, Antonino A. Daplas wrote:
Robert Siemer wrote:
quoted
On Sat, Jun 24, 2006 at 08:11:46PM +0800, Antonino A. Daplas wrote:
quoted
Robert Siemer wrote:
quoted
[4294669.980000]       Analog Display Input: Input Voltage - 0.700V/0.300V
[4294669.980000]       Sync: Separate Composite Sync on Green 
[4294669.981000]       Max H-size in cm: 31
[4294669.981000]       Max V-size in cm: 23
[4294669.981000]       Gamma: 1.80
[4294669.981000]       DPMS: Active yes, Suspend yes, Standby yes
[4294669.981000]       RGB Color Display
[4294669.981000]       Chroma
[4294669.981000]          RedX:     0.625 RedY:     0.340
[4294669.981000]          GreenX:   0.275 GreenY:   0.605
[4294669.981000]          BlueX:    0.150 BlueY:    0.065
[4294669.981000]          WhiteX:   0.283 WhiteY:   0.298
[4294669.981000]    Detailed Timings
[4294669.982000]       2 MHz 1 2 3 258 1 1 18 258 -HSync -VSync
[4294669.982000] 
[4294669.982000]       2 MHz 1 2 3 258 1 1 18 258 -HSync -VSync
[4294669.982000] 
[4294669.982000]       2 MHz 1 2 3 258 1 1 18 258 -HSync -VSync
[4294669.982000] 
Yes, your monitor has a broken EDID block.  It basically violated the
VESA detailed timing descriptor specs.
I noticed already.
Can you send me a dump of the EDID?  You can use read-edid for that.
What will the corrected behaviour look like. The edid is attached
(get-edid), but tell me what the changes to the kernel will cause!


Robert

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