On Tue, 23 Dec 2025 at 01:22, Mark Brown [off-list ref] wrote:

SME, the Scalable Matrix Extension, is an arm64 extension which adds
support for matrix operations, with core concepts patterned after SVE.

A late reply, but I just noticed that the cover letter says:

Userspace access to ZA and (if configured) ZT0 is always available, they
will be zeroed when the guest runs if disabled in SVCR and the value
read will be zero if the guest stops with them disabled. This mirrors
the behaviour of the architecture, enabling access causes ZA and ZT0 to
be zeroed, while allowing access to SVCR, ZA and ZT0 to be performed in
any order.

but the doc patch itself says:

+Access to the ZA and ZT0 registers is only available if SVCR.ZA is set
+to 1.

Which one is the intention here ?

thanks
-- PMM