[PATCH v24 7/7] arm64: dts: imx8ulp-evk: add reserved memory property
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STALE284d
SUPERSEDED: 1 (1M)
From: Pankaj Gupta <pankaj.gupta@nxp.com>
Date: 2026-01-21 08:57:43
Also in:
imx, linux-arm-kernel, linux-devicetree, lkml
Subsystem:
arm/freescale imx / mxc / layerscape arm architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
Status: Superseded by v25 (posted 2026-01-22). [go to v25]
Revision v24 (11 revisions archived); 1 review trailer (1 from subsystem maintainers).
Revisions (11)
Reserve 1MB of DDR memory region due to EdgeLock Enclave's hardware
limitation restricting access to DDR addresses from 0x80000000
to 0xafffffff.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 290a49bea2f7..10aaf02f8ea7 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts@@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ /dts-v1/;
@@ -37,6 +37,12 @@ linux,cma { linux,cma-default; }; + ele_reserved: memory@90000000 { + compatible = "shared-dma-pool"; + reg = <0 0x90000000 0 0x100000>; + no-map; + }; + m33_reserved: noncacheable-section@a8600000 { reg = <0 0xa8600000 0 0x1000000>; no-map;
@@ -259,6 +265,10 @@ &usdhc0 { status = "okay"; }; +&hsm0 { + memory-region = <&ele_reserved>; +}; + &fec { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet>;
--
2.43.0