Re: [PATCH v4 0/2] RISC-V: hwprobe: Misaligned scalar perf fix and rename

Hello:

This series was applied to riscv/linux.git (fixes)
by Palmer Dabbelt [off-list ref]:

On Fri,  9 Aug 2024 14:44:42 -0700 you wrote:

The CPUPERF0 hwprobe key was documented and identified in code as
a bitmask value, but its contents were an enum. This produced
incorrect behavior in conjunction with the WHICH_CPUS hwprobe flag.
The first patch in this series fixes the bitmask/enum problem by
creating a new hwprobe key that returns the same data, but is
properly described as a value instead of a bitmask. The second patch
renames the value definitions in preparation for adding vector misaligned
access info. As of this version, the old defines are kept in place to
maintain source compatibility with older userspace programs.

[...]

Here is the summary with links:
  - [v4,1/2] RISC-V: hwprobe: Add MISALIGNED_PERF key
    https://git.kernel.org/riscv/c/c42e2f076769
  - [v4,2/2] RISC-V: hwprobe: Add SCALAR to misaligned perf defines
    https://git.kernel.org/riscv/c/1f5288874de7

You are awesome, thank you!
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