[PATCH v6 03/10] riscv: Make legacy counter enum match the HW numbering
From: Alexandre Ghiti <hidden>
Date: 2023-08-02 08:07:12
Also in:
linux-arm-kernel, linux-perf-users, linux-riscv, lkml
Subsystem:
arm pmu profiling and debugging, risc-v pmu drivers, the rest · Maintainers:
Will Deacon, Mark Rutland, Atish Patra, Linus Torvalds
RISCV_PMU_LEGACY_INSTRET used to be set to 1 whereas the offset of this hardware counter from CSR_CYCLE is actually 2: make this offset match the real hw offset so that we can directly expose those values to userspace. Signed-off-by: Alexandre Ghiti <redacted> Reviewed-by: Andrew Jones <redacted> Reviewed-by: Atish Patra <redacted> --- drivers/perf/riscv_pmu_legacy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
index ca9e20bfc7ac..6a000abc28bb 100644
--- a/drivers/perf/riscv_pmu_legacy.c
+++ b/drivers/perf/riscv_pmu_legacy.c@@ -13,7 +13,7 @@ #include <linux/platform_device.h> #define RISCV_PMU_LEGACY_CYCLE 0 -#define RISCV_PMU_LEGACY_INSTRET 1 +#define RISCV_PMU_LEGACY_INSTRET 2 static bool pmu_init_done;
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2.39.2