Thread (45 messages) 45 messages, 8 authors, 2023-06-21

Re: [PATCH v2 06/10] drivers: perf: Implement perf event mmap support in the legacy backend

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From: Alexandre Ghiti <alex@ghiti.fr>
Date: 2023-06-15 07:42:08
Also in: linux-arm-kernel, linux-perf-users, linux-riscv, lkml

On 31/05/2023 16:27, Andrew Jones wrote:
On Fri, May 12, 2023 at 10:53:17AM +0200, Alexandre Ghiti wrote:
quoted
Implement the needed callbacks in the legacy driver so that we can
directly access the counters through perf in userspace.

Signed-off-by: Alexandre Ghiti <redacted>
---
  drivers/perf/riscv_pmu_legacy.c | 28 ++++++++++++++++++++++++++++
  1 file changed, 28 insertions(+)
diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
index ffe09d857366..f0f5bd856f66 100644
--- a/drivers/perf/riscv_pmu_legacy.c
+++ b/drivers/perf/riscv_pmu_legacy.c
@@ -74,6 +74,31 @@ static void pmu_legacy_ctr_start(struct perf_event *event, u64 ival)
  	local64_set(&hwc->prev_count, initial_val);
  }
  
+static uint8_t pmu_legacy_csr_index(struct perf_event *event)
+{
+	return event->hw.idx;
+}
+
+static void pmu_legacy_event_mapped(struct perf_event *event, struct mm_struct *mm)
+{
+	/* In legacy mode, the first 3 CSRs are available. */
Shouldn't this be

  /* In legacy mode, the first and third CSR are available. */

?

Yes, I guess this comment is not right in this context, so I'll remove the comment entirely as it does bring much.

quoted
+	if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES &&
+	    event->attr.config != PERF_COUNT_HW_INSTRUCTIONS)
+		return;
+
+	event->hw.flags |= PERF_EVENT_FLAG_USER_READ_CNT;
+}
+
+static void pmu_legacy_event_unmapped(struct perf_event *event, struct mm_struct *mm)
+{
+	/* In legacy mode, the first 3 CSRs are available. */
same comment
quoted
+	if (event->attr.config != PERF_COUNT_HW_CPU_CYCLES &&
+	    event->attr.config != PERF_COUNT_HW_INSTRUCTIONS)
+		return;
+
+	event->hw.flags &= ~PERF_EVENT_FLAG_USER_READ_CNT;
+}
+
  /*
   * This is just a simple implementation to allow legacy implementations
   * compatible with new RISC-V PMU driver framework.
@@ -94,6 +119,9 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
  	pmu->ctr_get_width = NULL;
  	pmu->ctr_clear_idx = NULL;
  	pmu->ctr_read = pmu_legacy_read_ctr;
+	pmu->event_mapped = pmu_legacy_event_mapped;
+	pmu->event_unmapped = pmu_legacy_event_unmapped;
+	pmu->csr_index = pmu_legacy_csr_index;
  
  	perf_pmu_register(&pmu->pmu, RISCV_PMU_LEGACY_PDEV_NAME, PERF_TYPE_RAW);
  }
-- 
2.37.2
Otherwise,

Reviewed-by: Andrew Jones <redacted>

Thanks!
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