Thread (27 messages) 27 messages, 2 authors, 2021-03-29
STALE1893d

[PATCH 01/23] atomctl.rst: A typo fix

From: Bhaskar Chowdhury <hidden>
Date: 2021-03-29 05:17:09
Also in: lkml
Subsystem: documentation, the rest · Maintainers: Jonathan Corbet, Linus Torvalds

s/controlers/controllers/

Signed-off-by: Bhaskar Chowdhury <redacted>
---
 Documentation/xtensa/atomctl.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/xtensa/atomctl.rst b/Documentation/xtensa/atomctl.rst
index 1ecbd0ba9a2e..a0efab2abe8f 100644
--- a/Documentation/xtensa/atomctl.rst
+++ b/Documentation/xtensa/atomctl.rst
@@ -23,7 +23,7 @@ doing a Cached (WB) transaction and use the Memory RCW for un-cached
 operations.

 For systems without an coherent cache controller, non-MX, we always
-use the memory controllers RCW, thought non-MX controlers likely
+use the memory controllers RCW, thought non-MX controllers likely
 support the Internal Operation.

 CUSTOMER-WARNING:
--
2.26.3
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