[PATCH v3 16/17] Documentation: PCI: Add binding documentation for pci-ntb endpoint function
From: Kishon Vijay Abraham I <hidden>
Date: 2020-09-04 07:52:44
Also in:
linux-pci, lkml
Subsystem:
documentation, pci endpoint subsystem, pci subsystem, the rest · Maintainers:
Jonathan Corbet, Manivannan Sadhasivam, Krzysztof Wilczyński, Bjorn Helgaas, Linus Torvalds
Add binding documentation for pci-ntb endpoint function that helps in adding and configuring pci-ntb endpoint function. Signed-off-by: Kishon Vijay Abraham I <redacted> --- .../PCI/endpoint/function/binding/pci-ntb.rst | 38 +++++++++++++++++++ Documentation/PCI/endpoint/index.rst | 1 + 2 files changed, 39 insertions(+) create mode 100644 Documentation/PCI/endpoint/function/binding/pci-ntb.rst
diff --git a/Documentation/PCI/endpoint/function/binding/pci-ntb.rst b/Documentation/PCI/endpoint/function/binding/pci-ntb.rst
new file mode 100644
index 000000000000..40253d3d5163
--- /dev/null
+++ b/Documentation/PCI/endpoint/function/binding/pci-ntb.rst@@ -0,0 +1,38 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================== +PCI NTB Endpoint Function +========================== + +1) Create a subdirectory to pci_epf_ntb directory in configfs. + +Standard EPF Configurable Fields: + +================ =========================================================== +vendorid should be 0x104c +deviceid should be 0xb00d for TI's J721E SoC +revid don't care +progif_code don't care +subclass_code should be 0x00 +baseclass_code should be 0x5 +cache_line_size don't care +subsys_vendor_id don't care +subsys_id don't care +interrupt_pin don't care +msi_interrupts don't care +msix_interrupts don't care +================ =========================================================== + +2) Create a subdirectory to directory created in 1 + +NTB EPF specific configurable fields: + +================ =========================================================== +db_count Number of doorbells; default = 4 +mw1 size of memory window1 +mw2 size of memory window2 +mw3 size of memory window3 +mw4 size of memory window4 +num_mws Number of memory windows; max = 4 +spad_count Number of scratchpad registers; default = 64 +================ ===========================================================
diff --git a/Documentation/PCI/endpoint/index.rst b/Documentation/PCI/endpoint/index.rst
index ef6861128506..9cb6e5f3c4d5 100644
--- a/Documentation/PCI/endpoint/index.rst
+++ b/Documentation/PCI/endpoint/index.rst@@ -14,3 +14,4 @@ PCI Endpoint Framework pci-ntb-function function/binding/pci-test + function/binding/pci-ntb
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2.17.1