The MA35D1 SoC has two USB PHY ports managed by a shared hardware block:
- PHY0 (USB0): OTG port shared between the DWC2 gadget controller and
the EHCI0/OHCI0 host controllers. A hardware mux automatically routes
USB0 signals to the correct controller based on the USB ID pin state.
- PHY1 (USB1): dedicated host-only port for EHCI1/OHCI1.
This series extends the existing phy-ma35d1-usb2.c driver and its binding
to cover both ports and add OTG role-switch support, while keeping full
backward compatibility with existing device trees.
Changes since v7:
- phy: add "depends on USB_ROLE_SWITCH || !USB_ROLE_SWITCH" to
PHY_MA35_USB, so a built-in PHY driver cannot be combined with a
modular role switch core (link failure on usb_role_switch_register()).
- phy: restore the PHY reset fallback. If the PHY is already in
operation mode but its clocks do not become stable, reset it and poll
again instead of failing immediately. The reset is still skipped when
the already-running PHY reports stable clocks.
- phy: gate the HUSBH0_GATE clock dynamically again. The clock is no
longer enabled for the whole lifetime of the driver (devm_clk_get()
instead of devm_clk_get_enabled()); .power_on/.power_off enable and
disable it, and .init enables it around its register accesses. The
gate can therefore close when neither port is powered.
- phy: nuvoton,oc-active-high: keep writing the polarity bit
unconditionally, so that an absent property means active-low as
documented in the binding, regardless of what the bootloader left in
MISCFCR0. The bit only affects the EHCI/OHCI host ports' VBUS
switch and is irrelevant to the gadget use of PHY0. This is a new
property in this series, and no mainline DT depends on a
bootloader-programmed polarity.
- Patches 1-3 are unchanged.
Changes since v6:
- phy: update the copyright notice in the rewritten driver header to
"2024-2026" instead of "2026", preserving the original 2024 date
rather than dropping it.
- phy: split the unused linux/io.h removal out of patch 4 into its
own patch (3/4), since it's unrelated cleanup that predates this
series (the driver has never done direct MMIO access; all register
access goes through regmap via syscon_regmap_lookup_by_phandle()).
Placed immediately before patch 4 since that is the first patch in
the series to touch this file.
Joey Lu (4):
dt-bindings: phy: nuvoton,ma35d1-usb2-phy: extend for dual-port and
OTG
arm64: dts: nuvoton: ma35d1: add USB controllers and dual-port PHY
node
phy: nuvoton: phy-ma35d1-usb2: remove unused linux/io.h include
phy: nuvoton: phy-ma35d1-usb2: extend to dual-port with OTG support
.../bindings/phy/nuvoton,ma35d1-usb2-phy.yaml | 44 ++-
.../boot/dts/nuvoton/ma35d1-iot-512m.dts | 36 ++
.../boot/dts/nuvoton/ma35d1-som-256m.dts | 36 ++
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 65 ++++
drivers/phy/nuvoton/Kconfig | 1 +
drivers/phy/nuvoton/phy-ma35d1-usb2.c | 313 +++++++++++++-----
6 files changed, 419 insertions(+), 76 deletions(-)
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
--
2.43.0