On 10/26/26 10:13, Michal Wilczynski wrote:
Hi Vinod,
On 10/3/26 16:22, Vinod Koul wrote:
quoted
On 15-09-26, 17:32, Michal Wilczynski wrote:
quoted
The Innosilicon HDMI PHY IP is used by several SoCs. They differ in
where the PHY register block sits in the register space and in which
pixel clocks they support, but the pre-PLL programming sequence and the
layout of its registers are the same.
Add a small library holding that shared part: the pre-PLL configuration
table format, a lookup, clk_ops determine_rate and recalc_rate helpers,
and the pre-PLL register programming. Callers pass a regmap, a register
offset for the PHY block, and their own pixel clock table.
No driver uses it yet; the users are converted separately.
Is there anything in phy patches here that has dependency with rest? If
not consider splitting it up...
On second thought, I agree it will be easier for maintainers to merge,
so I'll split it in v6. The PHY patches (the binding, the helpers, the
Rockchip conversion and the JH7110 PHY driver) will go as a separate
mini series.
Best regards,
--
Michal Wilczynski [off-list ref]