Re: [PATCH v4 2/3] arm64: dts: renesas: r9a09g047: Add USB2.0 support
From: sashiko-bot@kernel.org
Date: 2026-09-21 22:37:23
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] dts: nodes not sorted by unit address -- commit db8934356239e961e6360c8c46e87d977245ad6d Author: Tommaso Merciai [off-list ref] arm64: dts: renesas: r9a09g047: Add USB2.0 support The Renesas RZ/G3E (R9A09G047) SoC supports one channel with OTG/DRD and one channel with host interface. This commit adds the EHCI, OHCI, USB2.0 PHY, and reset control nodes for USB2.0 channels in the R9A09G047 SoC DTSI.
quoted hunk ↗ jump to hunk
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 72120e2abf8b4..56ceedfb8ae88 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi@@ -1773,6 +1773,130 @@ usb3_phy: usb-phy@15870000 { status = "disabled"; }; + ohci0: usb@15800000 {
[Severity: Low] This isn't a bug, but should the newly added nodes be sorted by unit address? The ohci0 node at address 15800000 is being placed after the existing usb3_phy node at 15870000.
+ compatible = "generic-ohci"; + reg = <0 0x15800000 0 0x100>;
[ ... ]
+ ohci1: usb@15810000 {
+ compatible = "generic-ohci";
+ reg = <0 0x15810000 0 0x100>;[ ... ]
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci0: usb@15800100 {[Severity: Low] Similarly, should ehci0 at address 15800100 be placed before ohci1 at 15810000 to maintain unit address sorting among the newly added nodes?
+ compatible = "generic-ehci"; + reg = <0 0x15800100 0 0x100>;
-- Sashiko AI review · https://sashiko.dev/#/patchset/cover.1790005703.git.tommaso.merciai.xr@bp.renesas.com?part=2