Re: [PATCH] dt-bindings: mailbox: qcom: Add MDM9607 APCS IPC

Hi Konrad,

Thanks for the review!

I based this on the downstream MDM9607 DT and clock driver (see 
https://android.googlesource.com/kernel/msm.git/+/android-7.1.0_r0.3/arch/arm/boot/dts/qcom/mdm9607.dtsi): 
the CPU mux/divider uses a separate register resource at 0x0b010008, and 
the APCS mailbox register is at 0x0b011008. But I see your point, I 
found SDX55 is using a layout very close to what you're proposing. That 
design might be superior indeed, although both would work. Let me think 
about it a bit more and come out with v2.

Best regards,
Dmitry


08.09.2026 13:02, Konrad Dybcio wrote:

On 9/8/26 10:11 AM, Dmitry Sinyavin wrote:

quoted

The MDM9607 APCS IPC register is at offset 0x8 in the KPSS global block.
Its CPU clock controller is in a separate block, so the existing MSM8994
APCS match data can be used without registering a clock device.

Aren't you going to bind one to APCS though? IIRC the setup on MDM9607
is somewhat similar to the one on 8916, although naturally a bit simpler.

+Stephan may know more

Konrad