[PATCH v2 8/9] arm64: dts: renesas: r9a09g077: Wire up DMA support for ADC
From: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Date: 2026-09-10 08:56:33
Also in:
linux-iio, linux-renesas-soc, lkml
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
RZ/T2H (R9A09G077) has three DMA controllers that can be used by peripherals like the ADC to offload data transfers from the CPU. Wire up the DMA channels for the ADC peripherals. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> --- V2: * no changes arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
index 42883338a6fd..5ea10361e300 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi@@ -1275,6 +1275,8 @@ adc0: adc@90014000 { clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKL>, <&cpg CPG_MOD 206>; clock-names = "adclk", "pclk"; + dmas = <&dmac0 0x26ba>, <&dmac1 0x26ba>, <&dmac2 0x26ba>; + dma-names = "rx", "rx", "rx"; power-domains = <&cpg>; #address-cells = <1>; #size-cells = <0>;
@@ -1297,6 +1299,8 @@ adc1: adc@90014400 { clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKL>, <&cpg CPG_MOD 207>; clock-names = "adclk", "pclk"; + dmas = <&dmac0 0x26bf>, <&dmac1 0x26bf>, <&dmac2 0x26bf>; + dma-names = "rx", "rx", "rx"; power-domains = <&cpg>; #address-cells = <1>; #size-cells = <0>;
@@ -1319,6 +1323,8 @@ adc2: adc@80008000 { clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKL>, <&cpg CPG_MOD 225>; clock-names = "adclk", "pclk"; + dmas = <&dmac0 0x26c4>, <&dmac1 0x26c4>, <&dmac2 0x26c4>; + dma-names = "rx", "rx", "rx"; power-domains = <&cpg>; #address-cells = <1>; #size-cells = <0>;
--
2.55.0