Thread (5 messages) flat view 5 messages, 1 author, 1d ago
WARM1d

Revision v3 of 3 in this series.

Revisions (3)
  1. v2 [diff vs current]
  2. v2 [diff vs current]
  3. v3 current

[PATCH v3 1/4] arm64: dts: socfpga: agilex5: add FPGA manager and region nodes

From: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
Date: 2026-09-07 08:29:22
Also in: lkml
Subsystem: arm/socfpga architecture, the rest · Maintainers: Dinh Nguyen, Linus Torvalds

Add the fpga-mgr child node under the svc firmware node and a fpga-region
node to enable FPGA configuration and partial reconfiguration on Agilex5.

The SMMU is already enabled upstream; it remains a hard requirement for
the svc driver to allocate DMA buffers within the SDM-accessible address
range.

Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index f54767d1526e..2e9844ce1ed4 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -85,9 +85,20 @@ svc {
 			method = "smc";
 			memory-region = <&service_reserved>;
 			iommus = <&smmu 10>;
+
+			fpga_mgr: fpga-mgr {
+				compatible = "intel,agilex-soc-fpga-mgr";
+			};
 		};
 	};
 
+	fpga-region {
+		compatible = "fpga-region";
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		fpga-mgr = <&fpga_mgr>;
+	};
+
 	psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
-- 
2.49.GIT
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help