Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect precedence in `dwc3_ref_clk_period` causes the deprecated `snps,ref-clock-period-ns` DT property to override the accurate hardware clock rate.
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commit bfd0f3ac4b25de50cc391001782d48a93da996fb
Author: George Moussalem [off-list ref]
usb: dwc3: core: Allow glue layer to pass reference clock rate
This commit allows the glue layer to pass the reference clock rate directly
to the DWC3 core driver. This enables hardware using the flattened snsp-dwc3
model to accurately calculate the period and frame length adjustment without
relying on the default reference clock.
quoted hunk ↗ jump to hunk
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fd5c2cd36c595..6ff0e4822b493 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -420,6 +420,9 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc)
} else if (dwc->ref_clk_per) {
period = dwc->ref_clk_per;
rate = NSEC_PER_SEC / period;
+ } else if (dwc->ref_clk_rate) {
+ rate = dwc->ref_clk_rate;
+ period = NSEC_PER_SEC / rate;
} else {
return;
}
[Severity: Medium]
Will this evaluation order cause issues for systems booting with a legacy
device tree?
If an older device tree defines the deprecated snps,ref-clock-period-ns
property, dwc->ref_clk_per is populated. In the flattened model, the glue
driver sets ignore_clocks_and_resets = true, which leaves dwc->ref_clk as
NULL.
Because dwc->ref_clk is NULL, the execution will fall into the
else if (dwc->ref_clk_per) block. This uses the deprecated and inaccurate
period-derived rate, completely bypassing the exact hardware clock rate now
provided via dwc->ref_clk_rate.
Should dwc->ref_clk_rate take precedence over the deprecated and less
accurate dwc->ref_clk_per?
[ ... ]
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Sashiko AI review · https://sashiko.dev/#/patchset/20260906-ipq-flatten-usb-v3-0-13e4e0f63123@outlook.com?part=1