Re: [PATCH v6 00/13] Ambarella CV75 SoC minimal bring-up
From: Jerome Brunet <jbrunet@baylibre.com>
Date: 2026-09-04 06:54:12
Also in:
linux-arm-kernel, linux-clk, linux-gpio, linux-serial, lkml
On ven. 04 sept. 2026 at 14:38, Long Zhao via B4 Relay [off-list ref] wrote:
This series adds minimal Ambarella CV75 support for early bring-up with a serial console: DT bindings, RCT/CCU clocks, pinctrl, PL061 GPIO via gpio-regmap, 8250_dw UART quirks, ARCH_AMBARELLA, CV75 EVK DT, and MAINTAINERS. This is a single unified series. Please apply via the SoC tree; subsystem maintainers are Cc'd for their pieces. Verified with: - scripts/checkpatch.pl --strict (0 errors) - make dt_binding_check DT_SCHEMA_FILES=ambarella:pl061-gpio.yaml:syscon.yaml:snps-dw-apb-uart.yaml - make CHECK_DTBS=y ambarella/cv75-evk.dtb - arm64 build of new drivers/DTS - CV75 EVK: console via 8250_dw (dw-apb-uart); GPIO edge IRQ (gpio-hammer / gpio-event-mon) Signed-off-by: Long Zhao <redacted> --- Changes in v6: - gpio: convert gpio-pl061 data path to gpio-regmap; keep PL061 irqchip (Andy, Linus). Add write_data_after_dir + girq helpers to gpio-regmap. Ambarella layout uses JEP106 periphid 0x000e8061; no AFSEL clearing in the GPIO driver; Ambarella skips unverified GPIO PM save/restore - serial: restore 8250_dw Ambarella quirks from v3; drop standalone 8250_ambarella (Andy). Commit message clarifies Ambarella IP with a DW-like register map needing only a thin quirk. Binding under snps-dw-apb-uart; DT uses ambarella,cv75-uart + snps,dw-apb-uart with reg-shift/reg-io-width - clock/RCT: document #reset-cells (Krzysztof); soft-reset ID header and reset provider deferred (no resets= consumers in this series) - arm64/Kconfig: do not select ARM_PSCI / HAVE_ARM_ARCH_TIMER (Sashiko) - pinctrl: no Ambarella suspend/resume claim without validated PM Link to v5: https://lore.kernel.org/r/20260818-cv75-v5-v5-0-7bbb12f0360f@ambarella.com (local) Link to v2: https://lore.kernel.org/r/20260806-longzhao-upstream-cv75-v2-v2-0-6b09707c5fe9@ambarella.com (local) Link to v3-A: https://lore.kernel.org/r/20260813-cv75-v3-a-v3-0-cfdd20b1b4dd@ambarella.com (local) Link to v3-B: https://lore.kernel.org/r/20260813-cv75-v3-b-v3-0-1d82e18da09b@ambarella.com (local) Link to v3-C: https://lore.kernel.org/r/20260813-cv75-v3-c-v3-0-9352b3fd6026@ambarella.com (local) Link to v4-B: https://lore.kernel.org/r/20260814-cv75-v4-b-v4-0-622e63153d97@ambarella.com
No change log ?
To: Arnd Bergmann <arnd@arndb.de>
To: Krzysztof Kozlowski <krzk@kernel.org>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: soc@lists.linux.dev
To: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <robh@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Michael Turquette <redacted>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>
Cc: Bartosz Golaszewski <brgl@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jirislaby@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Long Zhao <redacted>
Cc: Lee Jones <lee@kernel.org>
Cc: mfd@lists.linux.dev
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Long Zhao (13):
dt-bindings: arm: add Ambarella CV75 platforms
dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad
dt-bindings: clock: add Ambarella CV75 RCT
dt-bindings: pinctrl: add Ambarella CV75 pinctrl
dt-bindings: gpio: pl061: add Ambarella CV75 variant
dt-bindings: serial: snps-dw-apb-uart: add ambarella,cv75-uart
clk: ambarella: add CV75 CCU driver
gpio: regmap: support write_data_after_dir and girq
gpio: pl061: use gpio-regmap and add Ambarella layout
pinctrl: ambarella: add CV75 pin controller
serial: 8250_dw: add Ambarella CV75 quirks
arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT
MAINTAINERS: add ARM/AMBARELLA SoC support
.../devicetree/bindings/arm/ambarella.yaml | 24 +
.../bindings/clock/ambarella,cv75-rct.yaml | 64 ++
.../devicetree/bindings/gpio/pl061-gpio.yaml | 32 +-
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
.../bindings/pinctrl/ambarella,cv75-pinctrl.yaml | 239 +++++++
.../bindings/serial/snps-dw-apb-uart.yaml | 1 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
MAINTAINERS | 14 +
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/ambarella/Makefile | 3 +
arch/arm64/boot/dts/ambarella/cv75-evk.dts | 30 +
arch/arm64/boot/dts/ambarella/cv75.dtsi | 177 +++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/ambarella/Kconfig | 13 +
drivers/clk/ambarella/Makefile | 6 +
drivers/clk/ambarella/ccu-cv75.c | 296 ++++++++
drivers/clk/ambarella/ccu_common.c | 60 ++
drivers/clk/ambarella/ccu_common.h | 25 +
drivers/clk/ambarella/ccu_mux_div.c | 234 +++++++
drivers/clk/ambarella/ccu_mux_div.h | 35 +
drivers/clk/ambarella/ccu_pll.c | 421 ++++++++++++
drivers/clk/ambarella/ccu_pll.h | 70 ++
drivers/gpio/Kconfig | 2 +
drivers/gpio/gpio-pl061.c | 342 +++++----
drivers/gpio/gpio-regmap.c | 24 +-
drivers/pinctrl/Kconfig | 15 +
drivers/pinctrl/Makefile | 2 +
drivers/pinctrl/pinctrl-ambarella-cv75.c | 561 +++++++++++++++
drivers/pinctrl/pinctrl-ambarella.c | 761 +++++++++++++++++++++
drivers/pinctrl/pinctrl-ambarella.h | 50 ++
drivers/tty/serial/8250/8250_dw.c | 34 +
include/dt-bindings/clock/ambarella,cv75-rct.h | 15 +
include/linux/amba/bus.h | 1 +
include/linux/gpio/regmap.h | 13 +
37 files changed, 3439 insertions(+), 138 deletions(-)That is a lot of stuff mixed into a single series that could easily split
--- base-commit: 34cf6dafc47441dfb6b356a095b89c3585a93714 change-id: 20260818-cv75-v5-9e2039b349bc Best regards, -- Long Zhao [off-list ref]
-- Jerome