Thread (19 messages) 19 messages, 2 authors, 2026-08-27

Re: [PATCH v4 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC

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From: sashiko-bot@kernel.org
Date: 2026-08-27 16:59:00
Also in: linux-clk

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] The `tlmm` pinctrl node is missing the `wakeup-parent` property, breaking GPIO deep sleep wakeups.
- [High] The `rpmhpd` power domains lack consumers and will be automatically disabled by the PM core, causing a hardware crash.
- [Low] The `memory` node has a `reg` property but lacks a unit-address in its name.
--

commit b57e8c90f6a902093ad16d840222fdf3db7d8fd8
Author: Hardeep Sharma [off-list ref]

ARM: dts: qcom: Add initial device tree for Kuno SoC

Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS for the Qualcomm
Kuno SoC. This includes support for the Cortex-A7 CPU, RPMh, GCC, TLMM,
interconnect, UART, and SMEM.
quoted hunk ↗ jump to hunk
diff --git a/arch/arm/boot/dts/qcom/qcom-kuno.dtsi b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
new file mode 100644
index 0000000000000..d0c6e3f21a14f
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi
[ ... ]
quoted hunk ↗ jump to hunk
+	memory {
+		device_type = "memory";
+		/* Bootloader will fill base and size */
+		reg = <0x0 0x0>;
+	};
[Severity: Low]
Since this node defines a reg property starting at address 0x0, should
the node name be memory@0 to conform to DT specifications?

[ ... ]
quoted hunk ↗ jump to hunk
+		gcc: clock-controller@80000 {
+			compatible = "qcom,kuno-gcc";
+			reg = <0x00080000 0x1f4200>;
[Severity: High]
Should this node declare a power-domains property?

Foundational IP blocks like GCC typically reside in the CX power domain.
Is a non-zero voltage vote required here to avoid a hardware crash?
+			clocks = <&rpmhcc RPMH_CXO_CLK>,
[ ... ]
quoted hunk ↗ jump to hunk
+		tlmm: pinctrl@f000000 {
+			compatible = "qcom,kuno-tlmm";
+			reg = <0x0f000000 0x400000>;
+			interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&tlmm 0 0 110>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
[Severity: High]
Should this node specify wakeup-parent = <&pdc>; to route GPIO
wakeup interrupts to the Power Domain Controller?

Without this property, if the SoC enters a low-power mode, will a GPIO
interrupt fail to reach the PDC and GIC, fundamentally breaking system
suspend/resume functionality?

[ ... ]
quoted hunk ↗ jump to hunk
+			rpmhpd: power-controller {
+				compatible = "qcom,kuno-rpmhpd";
+				#power-domain-cells = <1>;
[Severity: High]
Are there any active consumers for this power domain provider across
the device tree?

Without consumers (like GCC above), the generic power domain (genpd)
framework will evaluate reference counts at late_initcall and power off
all rpmhpd domains.

Will this drop core SoC voltage domains to 0V and cause an immediate
boot failure?
+				operating-points-v2 = <&rpmhpd_opp_table>;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260827-kuno-soc-support-v4-0-dd34f235fc1a@oss.qualcomm.com?part=15
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