[PATCH v3 4/5] dt-bindings: media: Add rockchip rkisp2
From: Paul Elder <paul.elder@ideasonboard.com>
Date: 2026-08-27 10:49:31
Also in:
linux-arm-kernel, linux-media, linux-rockchip, lkml
Subsystem:
media input infrastructure (v4l/dvb), open firmware and flattened device tree bindings, the rest · Maintainers:
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add documentation for the Rockchip rkisp2 bindings. This is meant to support multiple versions of Rockchip ISPs going forward, including the 2.x series and 3.x series. The current version only adds the compatible for the RK3588, which is a 3.0. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> --- Changes in v3: - reorder patches No change in v2 --- .../devicetree/bindings/media/rockchip-isp2.yaml | 125 +++++++++++++++++++++ 1 file changed, 125 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/rockchip-isp2.yaml b/Documentation/devicetree/bindings/media/rockchip-isp2.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..b85c28e4d7aa8ceb5db55b49b4de10ef8ed704ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-isp2.yaml@@ -0,0 +1,125 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip-isp2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip SoC Image Signal Processing unit v2 + +maintainers: + - Paul Elder <paul.elder@ideasonboard.com> + +description: | + Rockchip ISP2 is the Camera interface for the Rockchip series of SoCs which + contains image processing, scaling, and compression functions. + +properties: + compatible: + enum: + - rockchip,rk3588-isp + + reg: + maxItems: 1 + + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + items: + - const: isp_irq + - const: mi_irq + + clocks: + minItems: 3 + items: + - description: ISP AXI clock (aclk) + - description: ISP AHB clock (hclk) + - description: ISP core clock (isp) + # for rk3588 + - description: ISP core clock (marvin) + - description: ISP core clock (vicap) + + clock-names: + minItems: 3 + items: + - const: aclk + - const: hclk + - const: clk_core + # for rk3588 + - const: clk_core_marvin + - const: clk_core_vicap + + iommus: + maxItems: 1 + + power-domains: + items: + - description: ISP power domain + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for VICAP in inline mode + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + required: + - port@0 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-isp + then: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + +additionalProperties: false + +examples: + - | + + #include <dt-bindings/clock/rockchip,rk3588-cru.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/rk3588-power.h> + + parent0: parent { + #address-cells = <2>; + #size-cells = <2>; + + isp0: isp@fdcb0000 { + compatible = "rockchip,rk3588-isp"; + reg = <0x0 0xfdcb0000 0x0 0x7f00>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "isp_irq", "mi_irq"; + clocks = <&cru ACLK_ISP0>, <&cru HCLK_ISP0>, + <&cru CLK_ISP0_CORE>, <&cru CLK_ISP0_CORE_MARVIN>, + <&cru CLK_ISP0_CORE_VICAP>; + clock-names = "aclk", "hclk", "clk_core", + "clk_core_marvin", "clk_core_vicap"; + power-domains = <&power RK3588_PD_VI>; + iommus = <&isp0_mmu>; + }; + };
--
2.47.2