Re: [PATCH 2/2] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3576
From: sashiko-bot@kernel.org
Date: 2026-08-26 12:45:09
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] The device tree nodes `csi1` and `csi3` reference undefined phandles `&csi_dphy0` and `&csi_dphy1`, which will cause `dtc` compilation failures. -- commit 2763e4828ff081f08fc3dbfa496335676826e8a1 Author: Amin Gattout [off-list ref] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3576 This commit adds device tree nodes for the MIPI1 and MIPI3 CSI-2 receiver units on the Rockchip RK3576. It intentionally omits other MIPI units which are either unsupported DCPHYs or split-mode DPHY lanes.
quoted hunk ↗ jump to hunk
diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index b0c0d3c8b1b14..adec5c762673b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi@@ -1314,6 +1314,58 @@ vdec_mmu: iommu@27b00800 { #iommu-cells = <0>; }; + csi1: csi@27c90000 { + compatible = "rockchip,rk3576-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg = <0x0 0x27c90000 0x0 0x10000>; + interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "err1", "err2"; + clocks = <&cru PCLK_CSI_HOST_1>; + phys = <&csi_dphy0>;
[Severity: Low] Does this introduce a regression by causing a dtc compilation failure? The csi_dphy0 phandle does not appear to be defined anywhere in rk3576.dtsi or its included headers.
+ power-domains = <&power RK3576_PD_VI>; + resets = <&cru SRST_P_CSI_HOST_1>; + status = "disabled";
[ ... ]
+ csi3: csi@27cb0000 {
+ compatible = "rockchip,rk3576-mipi-csi2", "rockchip,rk3568-mipi-csi2";
+ reg = <0x0 0x27cb0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "err1", "err2";
+ clocks = <&cru PCLK_CSI_HOST_3>;
+ phys = <&csi_dphy1>;[Severity: Low] Will this also cause a dtc compilation error for boards including this file? Similar to the csi1 node, the csi_dphy1 phandle appears to be undefined at this point. -- Sashiko AI review · https://sashiko.dev/#/patchset/20260826-csi-2-rcv-dts-v1-0-bcd8d459684d@gmail.com?part=2