Thread (31 messages) 31 messages, 4 authors, 9d ago

Re: [PATCH v11 02/12] dt-bindings: clk: zte: Add zx297520v3 matrix clock and reset controller

From: sashiko-bot@kernel.org
Date: 2026-08-25 21:29:18
Also in: linux-clk, linux-phy

This controller contains clocks and resets for high speed devices on the
zx297520v3 board and hardware spinlocks that I expect will be necessary
to communicate correctly with the LTE DSP firmware blob.

I don't know much about the hwlocks yet other than that they exist, so
there is no header yet adding meaning to their indices. Presumably that
meaning doesn't exist in hardware and is de facto defined by ZTE's
firmware blobs running on the rprocs.

The zte-zx297520v3-crm driver will instantiate separate MFD children for
clocks and resets, which are handled by separate clock and reset
drivers.

Reviewed-by: Krzysztof Kozlowski <redacted>
Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com>
Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260826-zx29clk-v11-0-f8ad59c6426c@gmail.com?part=2
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