Re: [PATCH v4 02/14] dt-bindings: iio: adc: Add AD7768

quoted

+  ref2p-supply:
+    description:
+      Positive reference input supply for REF2+. The voltage range is from
+      (AVSS + 1 V) to AVDD1. Together, REF2+ and REF2- must provide a
+      differential reference voltage from 1 V to |AVDD1 - AVSS|. This
+      reference is used by channels 4 to 7 on the AD7768 and channels 2 and 3
+      on the AD7768-4.
+
+  ref2n-supply:
+    description:
+      Negative reference input supply for REF2-. The voltage range is from
+      AVSS to (AVDD1 - 1 V).  

For all of the supplies, I don't think we need to repeat so much of what the
datasheet says. It is getting quite noisy and makes it hard to see the parts
of the description that are actually relevant to how the devicetree is to be
interpreted. (includes VCM as well)

Agreed.  Keep anything about how being present / not present may matter.
Pretty much anything else isn't really that interesting.
Sometimes
	xxx-supply: true

is enough.

quoted

+
+  reset-gpios:
+    maxItems: 1
+    description: GPIO connected to the active-low RESET pin
+
+  start-gpios:
+    maxItems: 1
+    description:
+      GPIO connected to the START pin. An active-low pulse on this pin
+      synchronizes the device to other AD7768 devices. When not used, this
+      pin must be tied to a logic high level through a pull-up resistor.
+      When used, SYNC_OUT must be wired back to SYNC_IN on all devices in
+      the synchronization chain.
+
+  sync-in-gpios:
+    maxItems: 1
+    description:
+      GPIO connected to the SYNC_IN pin. Receives the synchronization pulse
+      generated on SYNC_OUT in response to a START pulse. Must be synchronous
+      to the MCLK clock domain. In multi-device or daisy-chained systems,
+      two successive synchronization pulses must be applied to guarantee all
+      ADCs are synchronized.
+
+  sync-out-gpios:  

Unusual to have an output pin connected to a GPIO. Usually this would be an
interrupt or trigger-sources.

quoted

+    maxItems: 1
+    description:
+      GPIO connected to the SYNC_OUT pin. Outputs a synchronization pulse
+      synchronous to MCLK in response to a START pulse or SPI_SYNC command.
+      In single-device configurations this pin must be wired back to SYNC_IN.
+      In multi-device configurations it can be routed to the SYNC_IN pins of
+      all devices in the chain.  

Although this description makes it sounds like the SYNC_OUT pin is only ever
wired to SYNC_IN. So wouldn't be described here at all.

We don't have a particularly good way to say "this hardware controlled pin
is wired from this ADC to this second ADC"  As you note though GPIO doesn't
work for that.