Re: [PATCH v10 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP clock and reset controller
flat view
From: sashiko-bot@kernel.org
Date: 2026-08-10 07:05:11
Also in:
linux-phy
The clock controller of the zx297520v3 Low Speed Peripherals is relatively clean. One register per device with gates, muxes and resets and for some devices a divider. There are even bits in the matrix controller to control propagation of clock lines down to LSP. The clocks are sorted by register address and I am convinced that the device list is complete. There are, however, a few more registers that are likely extra dividers for TDM and I2S devices. Reviewed-by: Krzysztof Kozlowski <redacted> Signed-off-by: Stefan Dösinger <stefandoesinger@gmail.com>
Sashiko has reviewed this patch and found no issues. It looks great! -- Sashiko AI review · https://sashiko.dev/#/patchset/20260810-zx29clk-v10-0-63846490712c@gmail.com?part=3