[PATCH 01/16] dt-bindings: display: bridge: renesas,dsi: Document RZ/G3L
From: Biju <hidden>
Date: 2026-07-04 09:34:43
Also in:
dri-devel, linux-renesas-soc, lkml
Subsystem:
drm drivers, drm drivers and misc gpu patches, drm drivers for bridge chips, open firmware and flattened device tree bindings, the rest · Maintainers:
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Andrzej Hajda, Neil Armstrong, Robert Foss, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
From: Biju Das <biju.das.jz@bp.renesas.com> The RZ/G3L DSI IP is similar to the RZ/G2L but has different global PHY timings and also the PLLCLK is ungateble clock. Add the compatible string "renesas,r9a08g046-mipi-dsi" to handle these difference for the Renesas RZ/G3L SoC. The power to DSI region is controlled by SYSC block. Document renesas,sysc-pwrrdy property to handle the power control. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- .../bindings/display/bridge/renesas,dsi.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
index c20625b8425e..b114ac3b111a 100644
--- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml@@ -28,6 +28,7 @@ properties: - const: renesas,r9a09g057-mipi-dsi - enum: + - renesas,r9a08g046-mipi-dsi # RZ/G3L - renesas,r9a09g057-mipi-dsi # RZ/V2H(P) reg:
@@ -108,6 +109,20 @@ properties: power-domains: maxItems: 1 + renesas,sysc-pwrrdy: + description: + The system controller PWRRDY indicates to the DSI region, if the power + supply is ready. PWRRDY needs to be set during power-on before applying + any other settings. It also needs to be set before powering off the DSI. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: + System controller phandle required by DSI driver to set + PWRRDY + - description: Register offset associated with PWRRDY + - description: Register bitmask associated with PWRRDY + ports: $ref: /schemas/graph.yaml#/properties/ports
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2.43.0