Re: [PATCH v2 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode

On 5/26/26 12:54 PM, Maulik Shah wrote:

All PDC irqchip supports pass through mode in which both Direct SPIs and
GPIO IRQs (as SPIs) are sent to GIC without latching at PDC.

Newer PDCs (v3.0 onwards) also support additional secondary controller mode
where PDC latches GPIO IRQs and sends to GIC as level type IRQ. Direct SPIs
still works same as pass through mode without latching at PDC even in
secondary controller mode.

All the SoCs so far default uses pass through mode with the exception of
x1e. x1e PDC may be set to secondary controller mode for builds on CRD
boards whereas it may be set to pass through mode for IoT-EVK boards.
The mode configuration is done in firmware and initially shipped windows
firmware did not have SCM interface to read or modify the PDC mode.
Later only write access is opened up for non secure world.

Using the write access available add changes to modify the PDC mode to
pass through mode via SCM write. When the write fails (on older firmware)
assume to work in secondary mode.

Co-developed-by: Sneh Mankad <redacted>
Signed-off-by: Sneh Mankad <redacted>
Signed-off-by: Maulik Shah <redacted>
---

[...]

+static inline bool pdc_pin_uses_seconary_mode(int pin_out)

Please add a comment somewhere near here, repeating what you said in
the previous commit message (about the SPIs being mapped first, followed
by GPIO-as-SPIs)

Konrad