[PATCH 1/5] arm64: dts: st: reorder ommanager node in stm32mp257f-ev1.dts
From: Amelie Delaunay <amelie.delaunay@foss.st.com>
Date: 2026-06-11 08:58:23
Also in:
linux-arm-kernel, lkml
Subsystem:
arm/stm32 architecture, the rest · Maintainers:
Maxime Coquelin, Alexandre Torgue, Linus Torvalds
In the ST board DTS files, the &label entries must be ordered alphanumerically. The nodes became misordered when &ommanager and &lptimer3 were added simultaneouly. After that, <dc and &lvds used the &lptimers position as a reference. Move ommanager at the right place to avoid future misordering. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 56 +++++++++++++++--------------- 1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
index 14e033f365e3..f044331b8b55 100644
--- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts@@ -307,34 +307,6 @@ &i2c8 { /delete-property/dma-names; }; -&ommanager { - memory-region = <&mm_ospi1>; - memory-region-names = "ospi1"; - pinctrl-0 = <&ospi_port1_clk_pins_a - &ospi_port1_io03_pins_a - &ospi_port1_cs0_pins_a>; - pinctrl-1 = <&ospi_port1_clk_sleep_pins_a - &ospi_port1_io03_sleep_pins_a - &ospi_port1_cs0_sleep_pins_a>; - pinctrl-names = "default", "sleep"; - status = "okay"; - - spi@0 { - #address-cells = <1>; - #size-cells = <0>; - memory-region = <&mm_ospi1>; - status = "okay"; - - flash0: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <4>; - spi-max-frequency = <50000000>; - }; - }; -}; - /* use LPTIMER with tick broadcast for suspend mode */ &lptimer3 { status = "okay";
@@ -374,6 +346,34 @@ lvds_out0: endpoint { }; }; +&ommanager { + memory-region = <&mm_ospi1>; + memory-region-names = "ospi1"; + pinctrl-0 = <&ospi_port1_clk_pins_a + &ospi_port1_io03_pins_a + &ospi_port1_cs0_pins_a>; + pinctrl-1 = <&ospi_port1_clk_sleep_pins_a + &ospi_port1_io03_sleep_pins_a + &ospi_port1_cs0_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + + spi@0 { + #address-cells = <1>; + #size-cells = <0>; + memory-region = <&mm_ospi1>; + status = "okay"; + + flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; + }; +}; + &pcie_ep { pinctrl-names = "default", "init"; pinctrl-0 = <&pcie_pins_a>;
--
2.43.0