The i.MX93 MIPI DSI and CSI domains share control bits for clock and
reset in the media block controller. This creates a resource conflict
where one domain can inadvertently disable shared resources while the
other domain is still active, leading to system instability.

This series fixes the issue by introducing a dedicated MIPI PHY power
domain that owns the shared clock and reset control bits. The DSI and
CSI domains are then made subdomains of this PHY domain, ensuring proper
reference counting and preventing premature resource shutdown.

Tested on i.MX93 EVK with concurrent DSI and CSI operations.

Signed-off-by: Guoniu Zhou <redacted>
---
Guoniu Zhou (2):
      dt-bindings: power: imx93: Add MIPI PHY power domain
      pmdomain: imx93-blk-ctrl: Extract PHY as shared domain for DSI/CSI

 drivers/pmdomain/imx/imx93-blk-ctrl.c       | 60 ++++++++++++++++++++++++++++-
 include/dt-bindings/power/fsl,imx93-power.h |  1 +
 2 files changed, 59 insertions(+), 2 deletions(-)
---
base-commit: 3b7a18a34e8d3b14c7c926f033488a0350de9759
change-id: 20260608-pm_imx93-6ccc1aa11932

Best regards,
-- 
Guoniu Zhou [off-list ref]