On Mon, May 04, 2026 at 04:09:43PM +0800, Shawn Guo wrote:
quoted hunk ↗ jump to hunk
Document Applications Processor Subsystem (APSS) SMMU on Qualcomm
Nord SoC.
Signed-off-by: Shawn Guo <redacted>
---
Changes in v3:
- Improve commit log to expand APSS and drop "compatible with" part
- Link to v2: https://lore.kernel.org/all/20260427011728.231026-1-shengchao.guo@oss.qualcomm.com/ (local)
Changes in v2:
- Improve commit log to make the compatibility explicit
- Link to v1: https://lore.kernel.org/all/20260420022452.1239665-1-shengchao.guo@oss.qualcomm.com/ (local)
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 06fb5c8e7547..bf29e453058f 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,glymur-smmu-500
- qcom,kaanapali-smmu-500
- qcom,milos-smmu-500
+ - qcom,nord-smmu-500
This still looks incomplete - device does not have variable number of
clocks. I guess that's reoccuring pattern, so I will fix existing ones.
Best regards,
Krzysztof