Re: [PATCH v8 01/11] dt-bindings: clock: Document RZ/G3L SoC
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2026-03-26 18:24:15
Also in:
linux-clk, linux-renesas-soc, lkml
Hi Biju, On Tue, 24 Mar 2026 at 12:43, Biju [off-list ref] wrote:
From: Biju Das <biju.das.jz@bp.renesas.com>
Document the device tree bindings for the Renesas RZ/G3L SoC Clock Pulse
Generator (CPG). RZ/G3L CPG is similar to RZ/G2L CPG but has 5 clocks
compared to 1 clock on other SoCs.
Also define RZ/G3L (R9A08G046) Clock Pulse Generator Core Clocks, as
listed in section 4.4.4.1 ("Block Diagram of the Clock System"), module
clock outputs, as listed in section 4.4.2 ("Clock List r1.00") and add
Reset definitions referring to registers CPG_RST_* in Section 4.4.3
("Register") of the RZ/G3L Hardware User's Manual (Rev.1.00 Oct, 2025).
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>quoted hunk ↗ jump to hunk
--- /dev/null +++ b/include/dt-bindings/clock/r9a08g046-cpg.h
Missing "renesas," prefix.
quoted hunk ↗ jump to hunk
@@ -0,0 +1,342 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright (C) 2026 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__ +#define __DT_BINDINGS_CLOCK_R9A08G046_CPG_H__
Missing RENESAS_ infix.
Will fix accordingly while applying.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds