On 05/03/2026 12:01, Zhentao Guo wrote:

      2. Why canvas is needed?

 1. Since the ARM IOMMU HW is not integrated into the Amlogic SOCs,we
    need canvas to prevent the DDR memory used by the decoder from being
    rewrote by other hardware. Canvas provides the decoder with a
    configurable DDR memory range, as well as hardware-based detection
    and blocking for out-of-bounds access.
  2. From the diagram above, we can see a lite CPU called AMRISC. AMRISC
    is the controller of the decoder HW and the decoder driver needs to
    access the decoder hardware through AMRISC. However, AMRISC is a
    16-bit CPU and cannot directly handle 32-bit or 64-bit physical
    addresses. Therefore, canvas is required to convert the addresses
    into index to facilitate processing by the AMRISC core.

This suggests "Canvas" is IOMMU, thus use proper IOMMU abstractions and
you cannot have own phandle for it.

Best regards,
Krzysztof