Thread (20 messages) 20 messages, 6 authors, 2026-03-20

Re: [PATCH 2/2] pinctrl: renesas: rzt2h: Add pin configuration support

From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2026-03-03 13:53:19
Also in: linux-gpio, linux-renesas-soc, lkml

Hi Prabhakar,

On Tue, 14 Oct 2025 at 21:11, Prabhakar [off-list ref] wrote:
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add pin configuration support for the Renesas RZ/T2H SoC. The RZ/T2H allows
configuring pin properties through the DRCTLm (I/O Buffer Function
Switching) registers, including:
- Drive strength (low/middle/high/ultra high)
- Pull-up/pull-down/no-bias configuration (3 options: no pull, pull-up,
  pull-down)
- Schmitt trigger control (enable/disable)
- Slew rate control (2 options: slow/fast)

The drive strength configuration uses four discrete levels (low, middle,
high, ultra high) rather than the standard milliamp values. To properly
represent this hardware behavior, implement a custom device-tree binding
parameter "renesas,drive-strength" that accepts values 0-3 corresponding
to these discrete levels.

The DRCTLm registers are accessed in 32-bit mode, with each port split
into two halves (bits 0-3 and bits 4-7) requiring separate register
offsets.

Implement pinconf_ops to support:
- Getting/setting individual pin configurations
- Getting/setting pin group configurations
- Standard properties: bias-disable, bias-pull-up, bias-pull-down,
  input-schmitt-enable, slew-rate
- Custom property: renesas,drive-strength

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Just a minor drive-by comment for a patch that is still WIP...
quoted hunk ↗ jump to hunk
--- a/drivers/pinctrl/renesas/pinctrl-rzt2h.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzt2h.c
+static void rzt2h_drctl_rmw(struct rzt2h_pinctrl *pctrl, unsigned int pin,
+                           u32 mask, u32 val)
+{
+       u32 port = RZT2H_PIN_ID_TO_PORT(pin);
+       u8 bit = RZT2H_PIN_ID_TO_PIN(pin);
+       u32 offset = DRCTL(port);
+       unsigned long flags;
+       u32 drctl;
+
+       /* Access DRCTLm register in 32-bit mode */
+       if (bit >= 4)
+               offset += 4;
+
+       spin_lock_irqsave(&pctrl->lock, flags);
Please use "guard(spinlock_irqsave)(&pctrl->lock);" instead, to match
the style of the rest of the file.

Note that that will become "raw_spinlock_irqsave" soon, due to
"[PATCH v2] pinctrl: renesas: rzt2h: fix invalid wait context".
+       drctl = rzt2h_pinctrl_readl(pctrl, port, offset) & ~mask;
+       rzt2h_pinctrl_writel(pctrl, port, drctl | val, offset);
+       spin_unlock_irqrestore(&pctrl->lock, flags);
+}
Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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