Thread (11 messages) 11 messages, 3 authors, 2026-03-02

Re: [RFC v11 2/4] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux

From: Herve Codina <herve.codina@bootlin.com>
Date: 2026-03-02 09:03:02
Also in: linux-gpio, linux-riscv, lkml

Hi Conor,

On Fri, 27 Feb 2026 14:52:28 +0000
Conor Dooley [off-list ref] wrote:
From: Conor Dooley <conor.dooley@microchip.com>

On PolarFire SoC there are more GPIO interrupts than there are interrupt
lines available on the PLIC, and a runtime configurable mux is used to
decide which interrupts are assigned direct connections to the PLIC &
which are relegated to sharing a line.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>

Best regards,
Hervé
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