[PATCH RFC 5/8] soc: samsung: exynos-pmu: rename GS101_INTR_* regs to EXYNOS_INTR_*
From: Alexey Klimov <alexey.klimov@linaro.org>
Date: 2026-02-26 15:47:16
Also in:
linux-arm-kernel, linux-samsung-soc, lkml
Subsystem:
arm/samsung s3c, s5p and exynos arm architectures, the rest · Maintainers:
Krzysztof Kozlowski, Peter Griffin, Linus Torvalds
The PMU interrupt generation block is not exclusive to gs101 SoCs and is present on few Exynos-based platforms. Rename registers of this hardware block prefixed with GS101_INTR to be prefixed with EXYNOS_INTR. Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org> --- drivers/soc/samsung/exynos-pmu.c | 16 ++++++++-------- include/linux/soc/samsung/exynos-regs-pmu.h | 10 +++++----- 2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index d58376c38179..92870e6ffc1c 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c@@ -244,12 +244,12 @@ static int __gs101_cpu_pmu_online(unsigned int cpu) mask = BIT(cpu); - regmap_update_bits(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_ENABLE, + regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE, mask, (0 << cpu)); - regmap_read(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_UPEND, ®); + regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_UPEND, ®); - regmap_write(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_CLEAR, + regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_CLEAR, reg & mask); return 0;
@@ -304,16 +304,16 @@ static int __gs101_cpu_pmu_offline(unsigned int cpu) CPU_INFORM_C2); mask = BIT(cpu); - regmap_update_bits(pmu_context->pmuintrgen, GS101_GRP2_INTR_BID_ENABLE, + regmap_update_bits(pmu_context->pmuintrgen, EXYNOS_GRP2_INTR_BID_ENABLE, mask, BIT(cpu)); - regmap_read(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_UPEND, ®); - regmap_write(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_CLEAR, + regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, ®); + regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR, reg & mask); mask = (BIT(cpu + 8)); - regmap_read(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_UPEND, ®); - regmap_write(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_CLEAR, + regmap_read(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_UPEND, ®); + regmap_write(pmu_context->pmuintrgen, EXYNOS_GRP1_INTR_BID_CLEAR, reg & mask); return 0;
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index db8a7ca81080..9c4d3da41dbf 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h@@ -1009,11 +1009,11 @@ #define GS101_PHY_CTRL_UFS 0x3ec8 /* PMU INTR GEN */ -#define GS101_GRP1_INTR_BID_UPEND (0x0108) -#define GS101_GRP1_INTR_BID_CLEAR (0x010c) -#define GS101_GRP2_INTR_BID_ENABLE (0x0200) -#define GS101_GRP2_INTR_BID_UPEND (0x0208) -#define GS101_GRP2_INTR_BID_CLEAR (0x020c) +#define EXYNOS_GRP1_INTR_BID_UPEND (0x0108) +#define EXYNOS_GRP1_INTR_BID_CLEAR (0x010c) +#define EXYNOS_GRP2_INTR_BID_ENABLE (0x0200) +#define EXYNOS_GRP2_INTR_BID_UPEND (0x0208) +#define EXYNOS_GRP2_INTR_BID_CLEAR (0x020c) /* exynosautov920 */ #define EXYNOSAUTOV920_PHY_CTRL_USB20 (0x0710)
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2.51.0