On Wed, Feb 18, 2026 at 03:28:01PM +0100, Konrad Dybcio wrote:

On 18-Feb-26 12:58, Dmitry Baryshkov wrote:

quoted

On Wed, Feb 18, 2026 at 12:24:26PM +0100, Konrad Dybcio wrote:

quoted

On 2/18/26 12:18 PM, David Heidelberg wrote:

quoted

On 18/02/2026 11:30, Konrad Dybcio wrote:

quoted

On 2/17/26 10:20 PM, Dmitry Baryshkov wrote:

quoted

From: David Heidelberg <david@ixit.cz>

If the OS does not support recovering the state left by the
bootloader it needs a way to reset display hardware, so that it can
start from a clean state. Add a reference to the relevant reset.

This is not the relevant reset

You want MDSS_CORE_BCR @ 0xaf0_2000

Thanks, I prepared the fixes [1].

I'll try to test it if it's not breaking anything for us and send as v2 of [2].

David

[1] https://codeberg.org/sdm845/linux/commits/branch/b4/mdss-reset
[2] https://patchwork.kernel.org/project/linux-arm-msm/patch/20260112-mdss-reset-v1-1-af7c572204d3@ixit.cz/

Please don't alter the contents of dt-bindings, it really doesn't matter
if on sdm845 it's reset0 or reset1, that's why we define them in the first
place 

I dpn't think that will pass. Current reset is defined as RSCC, we can't
change that to CORE behind the scene. I'd prefer David's approach.

Back when I replied, David had a patch that removed the current RSCC
reset definition in dt-bindings (at index 0) and re-used that index
for CORE, putting RSCC at index 1. Perhaps it's better to link to
specific commits when making comments, note to self :P

Yes, I saw the commit having two resets. Anyway, as we saw, it doesn't
work.

-- 
With best wishes
Dmitry