[PATCH 5/5] arm64: dts: renesas: r9a09g047e57-smarc: Enable RSPI0
From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Date: 2026-02-17 16:25:07
Also in:
linux-clk, linux-renesas-soc, linux-spi, lkml
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
Enable RSPI0 on RZ/G3E SMARC EVK. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> --- .../boot/dts/renesas/r9a09g047e57-smarc.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
index 696903dc7a63..78dcbac8f4e8 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts@@ -167,6 +167,13 @@ rsci9_pins: rsci9 { bias-pull-up; }; + rspi0_pins: rspi0 { + pinmux = <RZG3E_PORT_PINMUX(M, 4, 2)>, /* MISOA */ + <RZG3E_PORT_PINMUX(M, 5, 2)>, /* MOSIA */ + <RZG3E_PORT_PINMUX(M, 7, 2)>, /* SSLA0 */ + <RZG3E_PORT_PINMUX(M, 6, 2)>; /* RSPCKA */ + }; + scif_pins: scif { pins = "SCIF_TXD", "SCIF_RXD"; renesas,output-impedance = <1>;
@@ -234,6 +241,15 @@ &rsci9 { }; #endif +&rspi0 { + pinctrl-0 = <&rspi0_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; +}; + &scif0 { pinctrl-0 = <&scif_pins>; pinctrl-names = "default";
--
2.43.0