Re: [PATCH 2/7] dt-bindings: mediatek: Add reset controller constants for mt8167
From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2026-02-12 11:36:40
Also in:
linux-arm-kernel, linux-mediatek, linux-watchdog, lkml
On Wed, Feb 11, 2026 at 07:03:23PM +0000, Luca Leonardo Scorcia wrote:
This file comes from the Lenovo Smart Clock kernel sources.
Where is the actual binding? Why is this separate file?
Signed-off-by: Luca Leonardo Scorcia <redacted> --- include/dt-bindings/reset/mt8167-resets.h | 38 +++++++++++++++++++++++
Filename matching compatible,
quoted hunk ↗ jump to hunk
1 file changed, 38 insertions(+) create mode 100644 include/dt-bindings/reset/mt8167-resets.hdiff --git a/include/dt-bindings/reset/mt8167-resets.h b/include/dt-bindings/reset/mt8167-resets.h new file mode 100644 index 000000000000..f77c2ca897cf --- /dev/null +++ b/include/dt-bindings/reset/mt8167-resets.h@@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ +/* + * Copyright (c) 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details.
Drop boiler plate. It is not even correct - conflicts SPDX which leads to another point - you need copyright owners agreement to relicense the code. Just write new one, instead of sending us 2015 old code.
+ */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8167 +#define _DT_BINDINGS_RESET_CONTROLLER_MT8167 + +/* TOPRGU resets */ +#define MT8167_TOPRGU_DDRPHY_FLASH_RST 0 /* reset ddrphy and flash pad macro */ +#define MT8167_TOPRGU_AUD_PAD_RST 1 /* Write 1 to reset audio_tdm_in_pad,audio_tdm_pad,audio_fifo */ +#define MT8167_TOPRGU_MM_RST 2 /* Write 1 to reset MMSYS */ +#define MT8167_TOPRGU_MFG_RST 3 /* Write 1 to reset MFG */ +#define MT8167_TOPRGU_MDSYS_RST 4 /* Write 1 to reset INFRA_AO */ +#define MT8167_TOPRGU_CONN_RST 5 /* Write 1 to reset CONNSYS WDT reset */ +#define MT8167_TOPRGU_PAD2CAM_DIG_MIPI_RX_RST 6 /* Write 1 to reset MM and its related pad macro(DPI,MIPI_CFG,MIPI_TX) */ +#define MT8167_TOPRGU_DIG_MIPI_TX_RST 7 /* Write 1 to reset digi_mipi_tx */ +#define MT8167_TOPRGU_SPI_PAD_MACRO_RST 8 /* Write 1 to reset SPI_PAD_MACRO */ +#define MT8167_TOPRGU_APMIXED_RST 10 /* Write 1 to reset APMIXEDSYS */ +#define MT8167_TOPRGU_VDEC_RST 11 /* Write 1 to reset VDEC module */ +#define MT8167_TOPRGU_CONN_MCU_RST 12 /* Write 1 to reset CONNSYS */ +#define MT8167_TOPRGU_EFUSE_RST 13 /* Write 1 to reset efuse */ +#define MT8167_TOPRGU_PWRAP_SPICTL_RST 14 /* Write 1 to reset pwrap_spictl module */ +#define MT8167_TOPRGU_SW_RST_NUM 15 + +/* MMSYS resets */ +#define MT8167_MMSYS_SW0_RST_B_DISP_DSI0 22
Nope, It's 16. IDs increment by 1. Best regards, Krzysztof