[PATCH V4 11/11] arm64: dts: imx95: Add Root Port node and PERST property
From: Sherry Sun <hidden>
Date: 2026-02-09 08:25:00
Also in:
imx, linux-arm-kernel, linux-pci, lkml
Subsystem:
arm/freescale imx / mxc arm architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
Since describing the PCIe PERST# property under Host Bridge node is now deprecated, it is recommended to add it to the Root Port node, so creating the Root Port node and add the reset-gpios property in Root Port. Signed-off-by: Sherry Sun <redacted> --- .../boot/dts/freescale/imx95-15x15-evk.dts | 5 +++++ .../boot/dts/freescale/imx95-19x19-evk.dts | 10 +++++++++ arch/arm64/boot/dts/freescale/imx95.dtsi | 22 +++++++++++++++++++ 3 files changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index d4184fb8b28c..42bc09e48b80 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts@@ -554,6 +554,7 @@ &netcmix_blk_ctrl { &pcie0 { pinctrl-0 = <&pinctrl_pcie0>; pinctrl-names = "default"; + /* This property is deprecated, use reset-gpios from the Root Port node. */ reset-gpio = <&gpio5 13 GPIO_ACTIVE_LOW>; vpcie-supply = <®_m2_pwr>; vpcie3v3aux-supply = <®_m2_pwr>;
@@ -568,6 +569,10 @@ &pcie0_ep { status = "disabled"; }; +&pcie0_port0 { + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; +}; + &sai1 { assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 041fd838fabb..6f193cf04119 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts@@ -540,6 +540,7 @@ &netc_timer { &pcie0 { pinctrl-0 = <&pinctrl_pcie0>; pinctrl-names = "default"; + /* This property is deprecated, use reset-gpios from the Root Port node. */ reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie0>; vpcie3v3aux-supply = <®_pcie0>;
@@ -554,9 +555,14 @@ &pcie0_ep { status = "disabled"; }; +&pcie0_port0 { + reset-gpios = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; +}; + &pcie1 { pinctrl-0 = <&pinctrl_pcie1>; pinctrl-names = "default"; + /* This property is deprecated, use reset-gpios from the Root Port node. */ reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; vpcie-supply = <®_slot_pwr>; vpcie3v3aux-supply = <®_slot_pwr>;
@@ -570,6 +576,10 @@ &pcie1_ep { status = "disabled"; }; +&pcie1_port0 { + reset-gpios = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; +}; + &sai1 { #sound-dai-cells = <0>; pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 55e2da094c88..7c5f350fe3a4 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi@@ -1883,6 +1883,17 @@ pcie0: pcie@4c300000 { iommu-map-mask = <0x1ff>; fsl,max-link-speed = <3>; status = "disabled"; + + pcie0_port0: pcie@0 { + compatible = "pciclass,0604"; + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie0_ep: pcie-ep@4c300000 {
@@ -1960,6 +1971,17 @@ pcie1: pcie@4c380000 { iommu-map-mask = <0x1ff>; fsl,max-link-speed = <3>; status = "disabled"; + + pcie1_port0: pcie@0 { + compatible = "pciclass,0604"; + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; pcie1_ep: pcie-ep@4c380000 {
--
2.37.1