[PATCH v3 08/10] arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
From: Biju <hidden>
Date: 2026-02-03 10:30:40
Also in:
linux-renesas-soc, lkml
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
From: Biju Das <biju.das.jz@bp.renesas.com> Add initial support for the RZ/G3L SMARC SoM with 2GB memory and extal clk. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v2->v3: * No change. v1->v2: * Dropped gpio.h header file. --- .../boot/dts/renesas/rzg3l-smarc-som.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
new file mode 100644
index 000000000000..7c21afaee9bc
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi@@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for R9A08G046L48 SMARC SoM board. + * + * Copyright (C) 2026 Renesas Electronics Corp. + */ + +/ { + compatible = "renesas,rzg3l-smarcm", "renesas,r9a08g046l48", "renesas,r9a08g046"; + + memory@48000000 { + device_type = "memory"; + /* First 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; +}; + +&extal_clk { + clock-frequency = <24000000>; +};
--
2.43.0