[PATCH RFC 2/8] dt-bindings: pinctrl: qcom,sm8750-tlmm: Allow clocks/clock-cells
From: Konrad Dybcio <konradybcio@kernel.org>
Date: 2026-02-02 14:58:04
Also in:
linux-arm-msm, linux-clk, linux-gpio, lkml
Subsystem:
arm/qualcomm mailing list, open firmware and flattened device tree bindings, pin control subsystem, pin controller - qualcomm, the rest · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij, Bjorn Andersson, Linus Torvalds
From: Konrad Dybcio <redacted> On SM8750 specifically, the TLMM block register space contains a number of gates that forward the system XO (reference) clock to various IP blocks. Allow '#clock-cells' (since it provides clocks) and 'clocks' (so that the parent clock may be consumed and linked with the clocks provided). Signed-off-by: Konrad Dybcio <redacted> --- .../devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml
index 7aecc97745a8..136366d89290 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml@@ -19,6 +19,10 @@ properties: compatible: const: qcom,sm8750-tlmm + clocks: + items: + - description: RPMh XO clock + reg: maxItems: 1
@@ -32,6 +36,9 @@ properties: gpio-line-names: maxItems: 215 + '#clock-cells': + const: 1 + patternProperties: "-state$": oneOf:
@@ -100,6 +107,8 @@ $defs: required: - compatible - reg + - clocks + - '#clock-cells' unevaluatedProperties: false
@@ -109,6 +118,7 @@ examples: tlmm: pinctrl@f100000 { compatible = "qcom,sm8750-tlmm"; reg = <0x0f100000 0x300000>; + clocks = <&rpmhcc_xo>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&tlmm 0 0 216>;
@@ -116,6 +126,8 @@ examples: #interrupt-cells = <2>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + #clock-cells = <1>; + gpio-wo-state { pins = "gpio1"; function = "gpio";
--
2.52.0