[PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4880 support
From: Antoniu Miclaus <antoniu.miclaus@analog.com>
Date: 2026-01-29 15:28:04
Also in:
linux-iio, lkml
Subsystem:
analog devices inc ad4080 driver, analog devices inc iio drivers, iio subsystem and drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Antoniu Miclaus, Nuno Sá, Michael Hennerich, Jonathan Cameron, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add AD4880 dual-channel ADC to the AD4080 bindings. The AD4880 is a dual-channel variant with two independent ADC channels, each with its own SPI configuration interface. For AD4880, the binding requires: - adi,aux-spi-cs property for secondary channel chip select - Two io-backends entries for each channel's data interface Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> --- .../bindings/iio/adc/adi,ad4080.yaml | 49 ++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index ccd6a0ac1539..3909e3095507 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml@@ -18,6 +18,9 @@ description: | service a wide variety of precision, wide bandwidth data acquisition applications. + The AD4880 is a dual-channel variant with two independent ADC channels, + each with its own SPI configuration interface. + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf $ref: /schemas/spi/spi-peripheral-props.yaml#
@@ -31,10 +34,18 @@ properties: - adi,ad4084 - adi,ad4086 - adi,ad4087 + - adi,ad4880 reg: maxItems: 1 + adi,aux-spi-cs: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Chip select for the auxiliary SPI interface used by multi-channel + devices like AD4880. Each additional channel beyond the first requires + its own SPI configuration interface on a separate chip select. + spi-max-frequency: description: Configuration of the SPI bus. maximum: 50000000
@@ -57,7 +68,8 @@ properties: vrefin-supply: true io-backends: - maxItems: 1 + minItems: 1 + maxItems: 2 adi,lvds-cnv-enable: description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
@@ -78,6 +90,23 @@ required: - vdd33-supply - vrefin-supply +allOf: + - if: + properties: + compatible: + contains: + const: adi,ad4880 + then: + properties: + io-backends: + minItems: 2 + required: + - adi,aux-spi-cs + else: + properties: + io-backends: + maxItems: 1 + additionalProperties: false examples:
@@ -98,4 +127,22 @@ examples: io-backends = <&iio_backend>; }; }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4880"; + reg = <0>; + adi,aux-spi-cs = <1>; + spi-max-frequency = <10000000>; + vdd33-supply = <&vdd33>; + vddldo-supply = <&vddldo>; + vrefin-supply = <&vrefin>; + clocks = <&cnv>; + clock-names = "cnv"; + io-backends = <&iio_backend_cha>, <&iio_backend_chb>; + }; + }; ...
--
2.43.0