On 28/01/2026 17:10, André Draszik wrote:

Hi,

This series adds support for the power domains on Google GS101.

There are a few differences compared to SoCs already supported by this
driver:
* register access does not work via plain ioremap() / readl() /
  writel().
  Instead, the regmap created by the PMU driver must be used (which
  uses Arm SMCC calls under the hood).
* DTZPC: a call needs to be made before and after power domain off/on,
  to inform the EL3 firmware of the request.
* power domains can and are fed by a regulator rail and therefore
  regulator control needed be implemented.

Thank you for the patch. My tree is currently closed for new features
till the end of the merge window. I will review and/or apply the patch
then. If I misjudged this patch and this is a fix, please let me know.


Best regards,
Krzysztof