Re: [PATCH v3 2/4] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts
From: Jan Petrous <jan.petrous@oss.nxp.com>
Date: 2026-01-26 12:46:52
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imx, linux-arm-kernel, lkml, netdev
On Fri, Jan 23, 2026 at 05:13:03PM +0000, Conor Dooley wrote:
On Fri, Jan 23, 2026 at 11:09:55AM +0100, Jan Petrous via B4 Relay wrote:quoted
From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com> The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines, set them to allow using Multi-IRQ mode when supported.The binding only supports s32{g,r} devices, why is the existing minimum retained? What devices are going to not have all 11 interrupts connected?
The original idea was to support backward compatibility, as older DTs didn't contain queue-based interrupt lines described. But now, when you asked, I started to think it is not needed, the requirement for backward compatibility is managed inside the driver and yaml shall describe the hardware not used configuration. Is it my understanding right? Should I provide v4 with minimum = 11? BR. /Jan