Re: [PATCH 1/2] dt-bindings: i2c: add atciic100
From: Ben Zong-You Xie <ben717@andestech.com>
Date: 2026-01-22 11:18:43
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On Sun, Feb 09, 2025 at 01:29:58PM +0100, Krzysztof Kozlowski wrote:
On Fri, Feb 07, 2025 at 10:19:22AM +0800, Ben Zong-You Xie wrote:quoted
Document devicetree bindings for Andes I2C controller.Explain what is the hardware... Here is Andes I2Cquoted
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> --- .../bindings/i2c/andestech,i2c-atciic100.yaml | 40 +++++++++++++++++++ MAINTAINERS | 5 +++ 2 files changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yamldiff --git a/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml b/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml new file mode 100644 index 000000000000..cf96a9186176 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/andestech,i2c-atciic100.yaml@@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/andestech,atciic100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Andes I2C ControllerHere as wellquoted
+ +maintainers: + - Ben Zong-You Xie [off-list ref] + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: andestech,atciic100But here atciic100. This is all confusing. What is the SoC? What is the name of this device?
Hi Krzysztof,
Sorry for the confusion. atciic100 is the name for the I2C IP block, and it
is integrated on QiLai SoC. That's why I added a new compatible
"andestech,qilai-i2c" in v2.
For AE350 platform, I know it has not been upstreamed yet, but it was
discussed and acknowledged in a separate SPI series [1], which is why I
included it as a fallback. Can I keep this? If not, I will drop it
and update the compatibles in v3 as follows:
properties:
compatible:
const: andestech,qilai-i2c
[1] https://lore.kernel.org/linux-spi/20251210-repeated-perjurer-99219893524a@spud/ (local)
Thanks,
Ben