Re: [PATCH v3 2/3] dt-bindings: pinctrl: aspeed: Add support for AST27xx

Add bindings for the pin controller found in ASPEED AST27xx SoCs.

The AST2700 SoC consists of two interconnected SoC instances, each
with its own pin controller register block managed by a separate
System Control Unit (SCU).

Introduce the "aspeed,ast2700-soc0-pinctrl" compatible string to
describe the SoC0 pin controller, which is not compatible with
existing ASPEED pinctrl bindings.

The SoC1 pin controller follows a regular and predictable register
layout and can be described using an existing generic pinctrl
binding, therefore no dedicated AST2700-specific compatible string
is introduced for it.

Signed-off-by: Billy Tsai <redacted>
---
 .../bindings/mfd/aspeed,ast2x00-scu.yaml           |  27 +++++
 .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml       | 130 +++++++++++++++++++++
 2 files changed, 157 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
index ff6cf8f63cbc..7eda8fddc560 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
+++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml

@@ -164,4 +164,31 @@ examples:
             reg = <0x7c 0x4>, <0x150 0x8>;
         };
     };
+
+  - |
+    syscon@12c02000 {
+        compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";