[PATCH 11/11] arm64: dts: mediatek: mt6795-xperia-m5: Add UHS pins for MMC1 and 2
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: 2026-01-09 11:48:07
Also in:
linux-arm-kernel, linux-mediatek, lkml
Subsystem:
arm/mediatek soc support, the rest · Maintainers:
Matthias Brugger, AngeloGioacchino Del Regno, Linus Torvalds
Add the UHS state pins for the MMC1 and MMC2 controllers and, while at it, also add the correct drive strength parameters for the default pin states for those two. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../dts/mediatek/mt6795-sony-xperia-m5.dts | 48 ++++++++++++++++++- 1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
index fccb948cfa45..ecd13d089ceb 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
+++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts@@ -227,8 +227,9 @@ &mmc0 { &mmc1 { /* MicroSD card slot */ - pinctrl-names = "default"; + pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; vmmc-supply = <&mt6331_vmc_reg>; vqmmc-supply = <&mt6331_vmch_reg>; status = "okay";
@@ -236,8 +237,9 @@ &mmc1 { &mmc2 { /* SDIO WiFi on MMC2 */ - pinctrl-names = "default"; + pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_uhs>; vmmc-supply = <&mt6331_vmc_reg>; vqmmc-supply = <&mt6331_vmch_reg>; status = "okay";
@@ -324,11 +326,32 @@ pins-cmd-dat { <PINMUX_GPIO170__FUNC_MSDC1_CMD>; input-enable; bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + drive-strength = <4>; }; pins-clk { pinmux = <PINMUX_GPIO175__FUNC_MSDC1_CLK>; bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + drive-strength = <4>; + }; + }; + + mmc1_pins_uhs: microsd-uhs-pins { + pins-cmd-dat { + pinmux = <PINMUX_GPIO171__FUNC_MSDC1_DAT0>, + <PINMUX_GPIO172__FUNC_MSDC1_DAT1>, + <PINMUX_GPIO173__FUNC_MSDC1_DAT2>, + <PINMUX_GPIO174__FUNC_MSDC1_DAT3>, + <PINMUX_GPIO170__FUNC_MSDC1_CMD>; + input-enable; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + drive-strength = <6>; + }; + + pins-clk { + pinmux = <PINMUX_GPIO175__FUNC_MSDC1_CLK>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + drive-strength = <8>; }; };
@@ -341,11 +364,32 @@ pins-cmd-dat { <PINMUX_GPIO105__FUNC_MSDC2_CMD>; input-enable; bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + drive-strength = <4>; + }; + + pins-clk { + pinmux = <PINMUX_GPIO104__FUNC_MSDC2_CLK>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + drive-strength = <4>; + }; + }; + + mmc2_pins_uhs: sdio-uhs-pins { + pins-cmd-dat { + pinmux = <PINMUX_GPIO100__FUNC_MSDC2_DAT0>, + <PINMUX_GPIO101__FUNC_MSDC2_DAT1>, + <PINMUX_GPIO102__FUNC_MSDC2_DAT2>, + <PINMUX_GPIO103__FUNC_MSDC2_DAT3>, + <PINMUX_GPIO105__FUNC_MSDC2_CMD>; + input-enable; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; + drive-strength = <8>; }; pins-clk { pinmux = <PINMUX_GPIO104__FUNC_MSDC2_CLK>; bias-pull-down = <MTK_PUPD_SET_R1R0_10>; + drive-strength = <8>; }; };
--
2.52.0