Re: [PATCH v4 4/6] riscv: dts: starfive: Add common board dtsi for VisionFive 2 Lite variants
From: Anand Moon <hidden>
Date: 2025-12-04 17:05:21
Also in:
linux-pci, linux-riscv, lkml
Hi Hal, On Tue, 25 Nov 2025 at 13:27, Hal Feng [off-list ref] wrote:
quoted hunk ↗ jump to hunk
Add a common board dtsi for use by VisionFive 2 Lite and VisionFive 2 Lite eMMC. Acked-by: Emil Renner Berthing <redacted> Tested-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- .../jh7110-starfive-visionfive-2-lite.dtsi | 161 ++++++++++++++++++ 1 file changed, 161 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite.dtsidiff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite.dtsi new file mode 100644 index 000000000000..f8797a666dbf --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite.dtsi@@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 StarFive Technology Co., Ltd. + * Copyright (C) 2025 Hal Feng <hal.feng@starfivetech.com> + */ + +/dts-v1/; +#include "jh7110-common.dtsi" + +/ { + vcc_3v3_pcie: regulator-vcc-3v3-pcie { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&sysgpio 27 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc_3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +};
The vcc_3v3_pcie regulator node is common to all JH7110 development boards. and it is enabled through the PWREN_H signal (PCIE0_PWREN_H_GPIO32). VisionFive 2 Product Design Schematics below [1] https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf Mars_Hardware_Schematics [2] https://github.com/milkv-mars/mars-files/blob/main/Mars_Hardware_Schematics/Milk-V_Mars_SCH_V1.21_2024-0510.pdf Thanks -Anand