Add support for microchip sama7d65 SoC I3C master only IP which is based on 
mipi-i3c-hci from synopsys implementing version 1.0 specification. The platform 
specific changes are integrated in the existing mipi-i3c-hci driver by introducing 
a quirk and SoC specific config option.

I3C in master mode supports up to 12.5MHz, SDR mode data transfer in
mixed bus mode (I2C and I3C target devices on same i3c bus).

Testing done:
With this patch we are able to fully configure the lsm6dso I3C slave
device. Unlike I2C, I hope there is no linux utility to check the
various transactions supported in the host controller. These features
will be tested later probably with I3C analyser KIT.

Durai Manickam KR (4):
  clk: at91: sama7d65: add peripheral clock for I3C
  i3c: mipi-i3c-hci: add microchip sama7d65 SoC
  ARM: configs: at91: sama7: add sama7d65 i3c-hci
  ARM: dts: microchip: add I3C controller

 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 12 ++++++
 arch/arm/configs/sama7_defconfig              |  2 +
 drivers/clk/at91/sama7d65.c                   |  5 ++-
 drivers/i3c/master/mipi-i3c-hci/Makefile      |  3 +-
 drivers/i3c/master/mipi-i3c-hci/core.c        | 28 ++++++++++++
 drivers/i3c/master/mipi-i3c-hci/hci.h         | 12 ++++++
 .../i3c/master/mipi-i3c-hci/hci_quirks_mchp.c | 43 +++++++++++++++++++
 7 files changed, 102 insertions(+), 3 deletions(-)
 create mode 100644 drivers/i3c/master/mipi-i3c-hci/hci_quirks_mchp.c

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2.34.1