[PATCH v3 6/7] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
From: Chen Wang <hidden>
Date: 2025-09-12 02:37:46
Also in:
linux-pci, linux-riscv, lkml
Subsystem:
risc-v architecture, the rest · Maintainers:
Paul Walmsley, Palmer Dabbelt, Albert Ou, Linus Torvalds
From: Chen Wang <redacted> Enable PCIe controllers for Sophgo SG2042_EVB_V1.X board, which uses SG2042 SoC. Signed-off-by: Han Gao <redacted> Signed-off-by: Chen Wang <redacted> --- arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts
index 3320bc1dd2c6..a186d036cf36 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts@@ -164,6 +164,18 @@ phy0: phy@0 { }; }; +&pcie_rc0 { + status = "okay"; +}; + +&pcie_rc1 { + status = "okay"; +}; + +&pcie_rc2 { + status = "okay"; +}; + &pinctrl { emmc_cfg: sdhci-emmc-cfg { sdhci-emmc-wp-pins {
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2.34.1