On 10/09/25 11:27, kernel test robot wrote:
Hi,

Yes, the patch has been updated on top of the latest linux-next branch 
and the issue is fixed. Will send this fix in patch v2 series.

EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe

Hi Durai,

kernel test robot noticed the following build errors:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next linus/master v6.17-rc5 next-20250909]
[cannot apply to abelloni/rtc-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Durai-Manickam-KR/clk-at91-sama7d65-add-peripheral-clock-for-I3C/20250909-192231
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20250909111333.170016-3-durai.manickamkr%40microchip.com
patch subject: [PATCH 2/4] i3c: master: add Microchip SAMA7D65 I3C HCI master driver
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20250910/202509101550.Bpclx47x-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250910/202509101550.Bpclx47x-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot [off-list ref]
| Closes: https://lore.kernel.org/oe-kbuild-all/202509101550.Bpclx47x-lkp@intel.com/ (local)

All error/warnings (new ones prefixed by >>):

quoted

quoted

drivers/i3c/master/sama7d65-i3c-hci-master.c:2478:35: error: initialization of 'int (*)(struct i2c_dev_desc *, struct i2c_msg *, int)' from incompatible pointer type 'int (*)(struct i2c_dev_desc *, const struct i2c_msg *, int)' [-Wincompatible-pointer-types]

     2478 |         .i2c_xfers              = mchp_i3c_hci_i2c_xfers,
          |                                   ^~~~~~~~~~~~~~~~~~~~~~
    drivers/i3c/master/sama7d65-i3c-hci-master.c:2478:35: note: (near initialization for 'mchp_i3c_hci_ops.i2c_xfers')
    drivers/i3c/master/sama7d65-i3c-hci-master.c:2283:12: note: 'mchp_i3c_hci_i2c_xfers' declared here
     2283 | static int mchp_i3c_hci_i2c_xfers(struct i2c_dev_desc *dev,
          |            ^~~~~~~~~~~~~~~~~~~~~~
    drivers/i3c/master/sama7d65-i3c-hci-master.c: In function 'mchp_i3c_hci_init':

quoted

quoted

drivers/i3c/master/sama7d65-i3c-hci-master.c:2517:30: warning: variable 'mode_selector' set but not used [-Wunused-but-set-variable]

     2517 |         bool size_in_dwords, mode_selector;
          |                              ^~~~~~~~~~~~~
    drivers/i3c/master/sama7d65-i3c-hci-master.c: At top level:

quoted

quoted

drivers/i3c/master/sama7d65-i3c-hci-master.c:2695:10: error: 'struct platform_driver' has no member named 'remove_new'; did you mean 'remove'?

     2695 |         .remove_new = mchp_i3c_hci_remove,
          |          ^~~~~~~~~~
          |          remove


vim +2478 drivers/i3c/master/sama7d65-i3c-hci-master.c

   2471
   2472  static const struct i3c_master_controller_ops mchp_i3c_hci_ops = {
   2473          .bus_init               = mchp_i3c_hci_bus_init,
   2474          .bus_cleanup            = mchp_i3c_hci_bus_cleanup,
   2475          .do_daa                 = mchp_i3c_hci_daa,
   2476          .send_ccc_cmd           = mchp_i3c_hci_send_ccc_cmd,
   2477          .priv_xfers             = mchp_i3c_hci_priv_xfers,

quoted

2478          .i2c_xfers              = mchp_i3c_hci_i2c_xfers,

   2479          .attach_i3c_dev         = mchp_i3c_hci_attach_i3c_dev,
   2480          .reattach_i3c_dev       = mchp_i3c_hci_reattach_i3c_dev,
   2481          .detach_i3c_dev         = mchp_i3c_hci_detach_i3c_dev,
   2482          .attach_i2c_dev         = mchp_i3c_hci_attach_i2c_dev,
   2483          .detach_i2c_dev         = mchp_i3c_hci_detach_i2c_dev,
   2484          .request_ibi            = mchp_i3c_hci_request_ibi,
   2485          .free_ibi               = mchp_i3c_hci_free_ibi,
   2486          .enable_ibi             = mchp_i3c_hci_enable_ibi,
   2487          .disable_ibi            = mchp_i3c_hci_disable_ibi,
   2488          .recycle_ibi_slot       = mchp_i3c_hci_recycle_ibi_slot,
   2489  };
   2490
   2491  static irqreturn_t mchp_i3c_hci_irq_handler(int irq, void *dev_id)
   2492  {
   2493          struct mchp_i3c_hci *hci = dev_id;
   2494          irqreturn_t result = IRQ_NONE;
   2495          u32 val;
   2496
   2497          val = reg_read(MCHP_INTR_STATUS);
   2498          dev_dbg(&hci->master.dev,"INTR_STATUS = %#x", val);
   2499
   2500          if (val & MCHP_INTR_HC_INTERNAL_ERR) {
   2501                  dev_err(&hci->master.dev, "Host Controller Internal Error\n");
   2502                  val &= ~MCHP_INTR_HC_INTERNAL_ERR;
   2503          }
   2504
   2505          hci->io->irq_handler(hci, 0);
   2506
   2507          if (val)
   2508                  dev_err(&hci->master.dev, "unexpected INTR_STATUS %#x\n", val);
   2509          else
   2510                  result = IRQ_HANDLED;
   2511
   2512          return result;
   2513  }
   2514
   2515  static int mchp_i3c_hci_init(struct mchp_i3c_hci *hci)
   2516  {

quoted

2517          bool size_in_dwords, mode_selector;

   2518          u32 regval, offset;
   2519          int ret;
   2520
   2521          /* Validate HCI hardware version */
   2522          regval = reg_read(MCHP_HCI_VERSION);
   2523          hci->version_major = (regval >> 8) & 0xf;
   2524          hci->version_minor = (regval >> 4) & 0xf;
   2525          hci->revision = regval & 0xf;
   2526          dev_notice(&hci->master.dev, "MIPI I3C HCI v%u.%u r%02u\n",
   2527                     hci->version_major, hci->version_minor, hci->revision);
   2528          /* known versions */
   2529          switch (regval & ~0xf) {
   2530          case 0x100:     /* version 1.0 */
   2531          case 0x110:     /* version 1.1 */
   2532          case 0x200:     /* version 2.0 */
   2533                  break;
   2534          default:
   2535                  dev_err(&hci->master.dev, "unsupported HCI version\n");
   2536                  return -EPROTONOSUPPORT;
   2537          }
   2538
   2539          hci->caps = reg_read(MCHP_HC_CAPABILITIES);
   2540          dev_dbg(&hci->master.dev,"caps = %#x", hci->caps);
   2541
   2542          size_in_dwords = hci->version_major < 1 ||
   2543                           (hci->version_major == 1 && hci->version_minor < 1);
   2544
   2545          regval = reg_read(MCHP_DAT_SECTION);
   2546          offset = FIELD_GET(MCHP_DAT_TABLE_OFFSET, regval);
   2547          hci->DAT_regs = offset ? hci->base_regs + offset : NULL;
   2548          hci->DAT_entries = FIELD_GET(MCHP_DAT_TABLE_SIZE, regval);
   2549          hci->DAT_entry_size = 8;
   2550          if (size_in_dwords)
   2551                  hci->DAT_entries = 4 * hci->DAT_entries / hci->DAT_entry_size;
   2552          dev_info(&hci->master.dev, "DAT: %u %u-bytes entries at offset %#x\n",
   2553                   hci->DAT_entries, hci->DAT_entry_size, offset);
   2554
   2555          regval = reg_read(MCHP_DCT_SECTION);
   2556          offset = FIELD_GET(MCHP_DCT_TABLE_OFFSET, regval);
   2557          hci->DCT_regs = offset ? hci->base_regs + offset : NULL;
   2558          hci->DCT_entries = FIELD_GET(MCHP_DCT_TABLE_SIZE, regval);
   2559          hci->DCT_entry_size = 16;
   2560          if (size_in_dwords)
   2561                  hci->DCT_entries = 4 * hci->DCT_entries / hci->DCT_entry_size;
   2562          dev_info(&hci->master.dev, "DCT: %u %u-bytes entries at offset %#x\n",
   2563                   hci->DCT_entries, hci->DCT_entry_size, offset);
   2564
   2565          regval = reg_read(MCHP_RING_HEADERS_SECTION);
   2566          offset = FIELD_GET(MCHP_RING_HEADERS_OFFSET, regval);
   2567          hci->RHS_regs = offset ? hci->base_regs + offset : NULL;
   2568          dev_info(&hci->master.dev, "Ring Headers at offset %#x\n", offset);
   2569
   2570          regval = reg_read(MCHP_PIO_SECTION);
   2571          offset = FIELD_GET(MCHP_PIO_REGS_OFFSET, regval);
   2572          hci->PIO_regs = offset ? hci->base_regs + offset : NULL;
   2573          dev_info(&hci->master.dev, "PIO section at offset %#x\n", offset);
   2574
   2575          regval = reg_read(MCHP_EXT_CAPS_SECTION);
   2576          offset = FIELD_GET(MCHP_EXT_CAPS_OFFSET, regval);
   2577          hci->EXTCAPS_regs = offset ? hci->base_regs + offset : NULL;
   2578          dev_info(&hci->master.dev, "Extended Caps at offset %#x\n", offset);
   2579
   2580          ret = i3c_hci_parse_ext_caps(hci);
   2581          if (ret)
   2582                  return ret;
   2583
   2584          /*
   2585           * Now let's reset the hardware.
   2586           * SOFT_RST must be clear before we write to it.
   2587           * Then we must wait until it clears again.
   2588           */
   2589          ret = readx_poll_timeout(reg_read, MCHP_RESET_CONTROL, regval,
   2590                                   !(regval & MCHP_SOFT_RST), 1, 10000);
   2591          if (ret)
   2592                  return -ENXIO;
   2593          reg_write(MCHP_RESET_CONTROL, MCHP_SOFT_RST);
   2594          ret = readx_poll_timeout(reg_read, MCHP_RESET_CONTROL, regval,
   2595                                   !(regval & MCHP_SOFT_RST), 1, 10000);
   2596          if (ret)
   2597                  return -ENXIO;
   2598
   2599          /* Disable all interrupts and allow all signal updates */
   2600          reg_write(MCHP_INTR_SIGNAL_ENABLE, 0x0);
   2601          reg_write(MCHP_INTR_STATUS_ENABLE, 0xffffffff);
   2602
   2603          hci->cmd = &mchp_mipi_i3c_hci_cmd_v1;
   2604          mode_selector = hci->version_major > 1 ||
   2605                                  (hci->version_major == 1 && hci->version_minor > 0);
   2606
   2607          /* Quirk for HCI_QUIRK_PIO_MODE on MICROCHIP platforms */
   2608          if (hci->quirks & MCHP_HCI_QUIRK_PIO_MODE) {
   2609                          hci->RHS_regs = NULL;
   2610          }
   2611
   2612          hci->io = &mchp_mipi_i3c_hci_pio;
   2613          dev_info(&hci->master.dev, "Using PIO\n");
   2614
   2615          microchip_set_od_pp_timing(hci);
   2616
   2617          return 0;
   2618  }
   2619

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